Abolfazl Azad

Electrical Engineering B.Sc. candidate at the University of Tehran focused on digital systems, RTL design, and computer architecture. Project experience includes SystemVerilog-based matrix-multiplication accelerator design and verification, SystemC-based FIR accelerator integration, and open-source RISC-V SoC verification. Supervised research spans low-power RTL optimization, hardware-aware weight quantization, and NeuroSim-based memristor/CIM characterization. Seeking research experience in energy-efficient digital design, hardware accelerators, RISC-V systems, and AI hardware.

Low-power RTL and switching-activity reduction; hardware accelerators and datapath/control design; computer architecture and RISC-V; hardware/software co-design; compute-in-memory (CIM); memristor-based neural networks and low-bit weight quantization.