Electrical Engineering student at the University of Tehran, with a secondary focus in Computer Engineering, working across digital systems, RTL design, FPGA development, computer architecture, and hardware accelerators.
I am building technical experience through academic coursework, independent projects, and engineering work. My primary interests include digital systems, low-power RTL design, hardware accelerators, and the ASIC design flow.
I actively work with hardware description languages like Verilog and SystemVerilog, and I am exploring advanced topics such as RISC-V processor architecture and hardware/software co-design.